Tegra186: use MSB of wake_time

This patch updates wake time of the cpu to use the MSBs and zero
out the LSB's. Only 24 out of 32 bits are currently passed
through the PSCI interface. Previously all the LSB's were used.

Change-Id: Ie2d9d1bf6e3003dd47526a124f64e6ad555d2371
Signed-off-by: Krishna Sitaraman <[email protected]>
Signed-off-by: Varun Wadekar <[email protected]>

diff --git a/plat/nvidia/tegra/soc/t186/plat_psci_handlers.c b/plat/nvidia/tegra/soc/t186/plat_psci_handlers.c
index 8485e04452ebf0950d212099e0201f994e2b1bae..a170b99479745da1e53db9214130398c62bd270e 100644 (file)
--- a/plat/nvidia/tegra/soc/t186/plat_psci_handlers.c
+++ b/plat/nvidia/tegra/soc/t186/plat_psci_handlers.c
@@ -55,7 +55,7 @@ extern uint32_t __tegra186_cpu_reset_handler_data,
 /* state id mask */
 #define TEGRA186_STATE_ID_MASK         0xF
 /* constants to get power state's wake time */
-#define TEGRA186_WAKE_TIME_MASK                0xFFFFFF
+#define TEGRA186_WAKE_TIME_MASK                0x0FFFFFF0
 #define TEGRA186_WAKE_TIME_SHIFT       4
 /* default core wake mask for CPU_SUSPEND */
 #define TEGRA186_CORE_WAKE_MASK                0x180c
@@ -76,9 +76,9 @@ int32_t tegra_soc_validate_power_state(unsigned int power_state,
        int state_id = psci_get_pstate_id(power_state) & TEGRA186_STATE_ID_MASK;
        int cpu = plat_my_core_pos();
 
-       /* save the core wake time (us) */
-       percpu_data[cpu].wake_time = (power_state >> TEGRA186_WAKE_TIME_SHIFT) &
-                        TEGRA186_WAKE_TIME_MASK;
+       /* save the core wake time (in TSC ticks)*/
+       percpu_data[cpu].wake_time = (power_state & TEGRA186_WAKE_TIME_MASK)
+                       << TEGRA186_WAKE_TIME_SHIFT;
 
        /*
         * Clean percpu_data[cpu] to DRAM. This needs to be done to ensure that